This invention relates to isolation of semiconductor integrated circuit devices and in particular to isolation of integrated circuit transistors by a combination of polysilicon and oxide isolation.
Techniques for achieving dielectric isolation usually require a compromise between surface planarity and isolation depth, which is ultimately reflected in a trade off between photolithographic resolution and device impurity profiles. For example, deep oxide moats which penetrate epi-collectors to the underlying substrate require long, high-temperature oxidations resulting in buried-collector out-diffusion which limits the minimum tolerable epi thickness. The lateral growth of selectively grown oxide at the interface with the Si.sub.3 N.sub.4 mask lifts the mask at the interface which severely affects surface planarity and degrades lithographic definition. Deep oxide isolation is further complicated by the push-ahead of epi-collector impurities which can lead to a breech in the isolation at the intersection of the oxide and the underlying substrate. Various techniques have been developed for overcoming this problem by combining junction isolation with oxide isolation using "reach down" and "reach up" diffusion at the oxidesubstrate interface, at the cost of further processing complexity.
In an attempt to eliminate deep oxidations and thus minimize these problems a technique was developed by M. L. Naiman, Electrical Society Meeting, San Francisco, Calif. May 1974, for growing high-resistance polysilicon isolation simultaneously with n-type epi growth by introducing a thin oxide spoiler layer under poly isolation regions. The resulting structure provides the desired dielectric isolation, eliminates high-temperature processing and achieves good planarity. However, it cannot be used in the space-saving walled-emitter geometry where isolation oxide impinges directly on the emitter diffusion because enhanced diffusion in the poly leads to emitter-collector shorting. Thus one of the major advantages of dielectric isolation is severely compromised.